The Intel Quartus Prime Pro Edition Design Software is equipped with both functional and security updates. To enhance security and ensure optimal performance, users must maintain up-to-date software and adhere to recommended technical guidelines. Additional security updates are in the pipeline and will be promptly provided as they become available. Users are strongly encouraged to install the latest version upon its release.
It's important to note that Intel Quartus Prime Pro Edition may be removed from the web when support for all devices in this release is available in a newer version or when all devices supported by this version become obsolete. If you wish to receive customer notifications via email, please subscribe to our customer notification mailing list.
If you are utilizing a floating license server for Intel FPGA software, it is essential to upgrade to the latest license daemon software. The Pro version of Intel FPGA software is not compatible with older versions of the daemon software.
This user guide offers a comprehensive overview of the fundamental concepts and operation of the Intel Quartus Prime Pro Edition design software. It covers aspects such as the GUI and project structure basics, initial design planning, utilization of Intel FPGA IP, and migration to Intel Quartus Prime Pro Edition. This software provides a complete design environment tailored for the most advanced Intel FPGA and SoC designs, including Intel Agilex™, Intel Stratix 10, Intel Arria 10, and Intel Cyclone 10 GX.
The Intel Quartus Prime GUI simplifies design entry, expedites design processing, facilitates device programming, and seamlessly integrates with other industry-standard EDA tools. The user-friendly interface allows you to concentrate on your design rather than the intricacies of the design tool. The modular Compiler optimizes the FPGA development process and guarantees top-notch performance with minimal effort.
The Intel Quartus Prime Pro Edition software encompasses flexible design methodologies, advanced synthesis, and support for the latest Intel FPGA architectures and hierarchical design workflows. The Compiler empowers users with powerful and customizable design processing to achieve the best possible design implementation in silicon. Notable features exclusive to the Intel Quartus Prime Pro Edition include:
Hyper-Aware Design Flow: Leveraging Hyper-Retiming and Fast Forward compilation to achieve peak performance in Intel Agilex™ and Intel Stratix 10 devices.
Intel Quartus Prime Pro Edition synthesis: Integration of a new, more stringent language parser supporting all major IEEE RTL languages, enhanced algorithms, and parallel synthesis capabilities. Added support for SystemVerilog 2009.
Hierarchical project structure: Preservation of individual post-synthesis, post-placement, and post-place and route results for each design instance. This enables optimization without affecting other partition placement or routing.
Incremental Fitter Optimizations: The ability to run and optimize Fitter stages incrementally, with each stage generating detailed reports.
Faster, more accurate I/O placement: Improved interface I/O planning with Interface Planner.
Platform Designer: Building on the system design and custom IP integration capabilities of Platform Designer, the Pro Edition introduces hierarchical isolation between system interconnect and IP components.
Partial Reconfiguration: The capability to reconfigure a portion of the FPGA while the remaining FPGA functions uninterrupted.
Block-Based Design Flows: Preservation and reusability of design blocks at various compilation stages.
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